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Á¦Ç°¼Ò°³ > Imaging & Vision > Camera Simulators

Camera Simulators

Camera Simulators
ProcCamSim
ProcCamSimÀº ÇÁ·¹ÀÓ±×·¹¹ö¿ë Camera Link / CoaXPress À̹ÌÁö¿Í Å×½ºÆ® ÆÐÅÏÀ» »ý¼ºÇÏ´Â À¯¿¬ÇÑ °í¼º´É Ä«¸Þ¶ó ½Ã¹Ä·¹ÀÌÅͷλç¿ëÀÚ´Â Àúºñ¿ëÀÇ Á¶¿ëÇÑ ·¦ ȯ°æ¿¡¼­ ´ëºÎºÐÀÇ °³¹ß ÀÛ¾÷À» ¼öÇà ÇÒ ¼ö ÀÖ½À´Ï´Ù.

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ProcCamSim
Camera Link/CoaXPress Camera Simulator System

 

The Gidel ProcCamSim is a flexible high-performance camera simulator that generates Camera Link/CoaXPress images and test patterns for a frame grabber enabling the users to perform most of the development at a low cost quiet lab environment.


¡á Generates Camera video and test patterns
¡á Simulates all Camera Link v2.0 configurations
¡á Simulates all CoaXPress v1.1 image formats
¡á Supports BMP and RAW input image files
¡á Internal hardware fixed-pattern generator
¡á Up to 4GB image buffer for Camera Link and up to 8GB for CoaXPress
¡á API methods for developing user simulation
¡á Configurable CC lines for triggering options
¡á Interfaces with the ProcFG - Gidel's frame grabbing and processing or any standard Frame Grabber
 

 

SPECIFICATION


ProcCamSim Specifications:


¡á Simulates all Camera Link v2.0 configurations (base / medium / full/ 80 bit). The signals are outputted via a pair of

   standard MDR-26 connectors
¡á Simulates all CoaXPress image formats, including Raw, Mono, Planar, Planar Raw, Bayer, RGB, RGBA, YUV,

   YCbCr601, YCbCr709
¡á Software GUI providing a fast and easy method to configure the Simulator to mimic any Camera Link compatible

   camera and to output the desired image to the target system
¡á API methods suite for user application development
¡á Camera Link outputs 1-10 pixels simultaneously at 7,000-85,000 KHz. Pixel bit depth varies from 8 to 36 bits

   per pixel.
¡á Maximal frame width: 16,777,215 pixels (24 bits value) Maximal frame height: 65,535 lines (16 bits value) or infinite

   in Line Scan simulation mode
¡á Supports continuous line scan mode.
¡á Fully configurable timing: back and front porch, frame and line pauses.
¡á Works with external Camera (Simulator) control signals, such as frame / line triggers via CC lines, IO signal, or

   cXp host trigger line.
¡á User-configurable CC lines functionality via GUI for triggering options
¡á Frame source: image files or SW generated patterns
¡á Supports BMP and RAW data source files. Enables video simulation via streaming of BMP/RAW images
¡á SW static-pattern generator
¡á Flexibility in building a custom-made simulator by adding:
   ◦ User logic to the FPGA design
   ◦ User's software application via API methods
¡á 4GB for Camera Link and 8GB for CoaXPress image buffer on SODIMM
¡á Machine simulator capability by adding user IOs
¡á Interfaces with the ProcFG - Gidel's FPGA-based frame grabbing and processing system

 


BLOCK DIAGRAM


ProcCamSim System:

 

 

ProcCamSim-System-Block.png

 

 

 
ORDERING

 

 Camera

 Simulator             

 Outputs          

 Pixel

 Clock   

 Host

 Bus       

 Buffer   Features  
 ProcCamSim-A  

 Single Base/

 Medium/

 Full/80bit

 (Deca)

 up to 85

 MHz

 PCIe x4  4GB  4GB on-board FIFO or Memory, ProcCamSim-A Light Application GUI API and IP, FPGA template and Gidel Proc Developer's Kit. Uses Proce III80 board with Stratix III 80 FPGA for simulating Camera Link (all modes) and optional machine simulation, Psdb_CL_Out for Camera Link (all modes) output interfacing. Supported by Gidel ProcFG Frame Grabber or any Industry standard Frame Grabbers.                  

 ProcCamSim-A

 Light       

 Single Base/

 Medium/

 Full/80bit

 (Deca)      

 up to 85

 MHz

 PCIe x4   4GB  4GB on-board FIFO or Memory, ProcCamSim-A Light Application GUI, API and IP, FPGA template. Uses Proce III80 board with Stratix III 80 FPGA for simulating Camera Link (all modes) and optional machine simulation, Psdb_CL_Out for Camera Link (all modes) output interfacing. Supported by Gidel ProcFG Frame Grabber or any Industry standard Frame Grabbers.                 
 ProcCamSim-X   

 4 x 

 CoaXPress-6

 (up to

 6.25Gb/s)  

 25Gbit      PCIe x8 Gen 2/3  8GB  8GB on-board FIFO or Memory, ProcCamSim-X Light Application GUI, API and IP, FPGA template and Gidel Proc Developer's Kit. Uses ProceV A3 board with Stratix V A3 FPGA for simulating up to 4 channels CoaXPress 6.25G Camera and optional machine simulation, PHS_cXp6x4_Out for 4 x 6.25 CoaXPress output channels interfacing. Supported by Gidel ProcFG Frame Grabber or any Industry standard Frame Grabbers.                 

 ProcCamSim-X

 Light        

 4 x

 CoaXPress-6

 (up to

 6.25Gb/s)   

 25Gbit   PCIe x8 Gen 2/3     8GB  8GB on-board FIFO or Memory, ProcCamSim-X Light Application GUI, API and IP, FPGA template. Uses ProceV A3 board with Stratix V A3 FPGA for simulating up to 4 channels CoaXPress 6.25G Camera and optional machine simulation, PHS_cXp6x4_Out for 4 x 6.25 CoaXPress output channels interfacing, Supported by Gidel ProcFG Frame Grabber or any Industry standard Frame Grabbers.             

 

 



DOWNLOADS


¤± ProcCamSim Product Brief
¤± ProceIII Product Brief

 

 

 

 

 

 

 

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